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 AP9452GG
Pb Free Plating Product
Advanced Power Electronics Corp.
Lower gate charge Capable of 2.5V gate drive Single Drive Requirement G S D
N-CHANNEL ENHANCEMENT MODE POWER MOSFET
BVDSS RDS(ON) ID
20V 50m 4A
Description
The Advanced Power MOSFETs from APEC provide the designer with the best combination of fast switching, ruggedized device design, ultra low on-resistance and cost-effectiveness. D
S
SOT-89
D G
Absolute Maximum Ratings
Symbol VDS VGS ID@TA=25 ID@TA=70 IDM PD@TA=25 TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current, VGS @ 4.5V Continuous Drain Current, VGS @ 4.5V Pulsed Drain Current
1 3 3
Rating 20 16 4 2.5 12 1.25 0.01 -55 to 150 -55 to 150
Units V V A A A W W/
Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range
Thermal Data
Symbol Rthj-a Parameter Thermal Resistance Junction-ambient
3
Value Max. 100
Unit /W
Data and specifications subject to change without notice
201224031
AP9452GG
Electrical Characteristics@Tj=25oC(unless otherwise specified)
Symbol BVDSS
BVDSS/Tj
Parameter Drain-Source Breakdown Voltage
Test Conditions VGS=0V, ID=250uA
2
Min. 20 0.7 -
Typ. 0.03 10 6 1 2 8 9 13 3 360 80 65
Max. Units 38 50 80 1.5 1 25 100 10 570 V V/ m m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF
Breakdown Voltage Temperature Coefficient Reference to 25, ID=1mA
RDS(ON)
Static Drain-Source On-Resistance
VGS=10V, ID=4A VGS=4.5V, ID=4A VGS=2.5V, ID=3A
VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss
Gate Threshold Voltage Forward Transconductance
2
o o
VDS=VGS, ID=250uA VDS=5V, ID=3A VDS=20V, VGS=0V VDS=16V ,VGS=0V VGS= 16V ID=4A VDS=16V VGS=4.5V VDS=10V ID=1A RG=3.3,VGS=5V RD=10 VGS=0V VDS=20V f=1.0MHz
Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70 C)
Gate-Source Leakage Total Gate Charge
2
Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
2
Source-Drain Diode
Symbol VSD Parameter Forward On Voltage
2
Test Conditions IS=1A, VGS=0V IS=4A, VGS=0V, dI/dt=100A/s
Min. -
Typ. 18 10
Max. Units 1.3 V ns nC
trr
Qrr
Reverse Recovery Time Reverse Recovery Charge
Notes:
1.Pulse width limited by safe operating area. 2.Pulse width <300us , duty cycle <2%. 3.Surface mount on FR4 board, t < 10s.
AP9452GG
50 40
T A =25 C
40
o
T A =150 C 4.5V ID , Drain Current (A)
30
o
4.5V
ID , Drain Current (A)
30
3.5V
20
3.5V
20
10
2.5V V GS =1.5V
10
2.5V V GS =1.5V
0 0 1 2 3 4 5 6
0 0 1 2 3 4 5 6 7
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
65
1.8
ID=4A
55
I D =4A
1.6
T A =25 C Normalized R DS(ON)
1.4
o
V GS =4.5V
RDS(ON) (m )
45
1.2
1.0
35
0.8
25
0.6 1 3 5 7 9 11 -50 0 50 100 150
V GS , Gate-to-Source Voltage (V)
T j , Junction Temperature ( C)
o
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance v.s. Junction Temperature
1.2
100
10
0.95
VGS(th) (V)
T j =150 o C IS (A)
1
T j =25 o C
0.7
0.1
0.45
0.01 0 0.4 0.8 1.2 1.6
0.2 -50 0 50 100 150
V SD , Source -to-Drain Voltage (V)
T j , Junction Temperature ( o C )
Fig 5. Forward Characteristic of
Reverse Diode
Fig 6. Gate Threshold Voltage v.s. Junction Temperature
AP9452GG
f=1.0MHz
14
1000
VGS , Gate to Source Voltage (V)
12
ID=4A Ciss V DS =16V V DS =12V V DS =10V C (pF)
100
10
8
6
Coss Crss
4
2
0
10 0 2 4 6 8 10 12 14 16 1 5 9 13 17 21 25 29
Q G , Total Gate Charge (nC)
V DS , Drain-to-Source Voltage (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
100
1
Normalized Thermal Response (Rthjc)
Duty factor=0.5
0.2
10
0.1
0.1
ID (A)
1
1ms 10ms 100ms
0.05
0.02
0.01
PDM
0.01
Single Pulse
t T
Duty factor = t/T Peak Tj = PDM x Rthjc + TC Rthja=100/W
0.1
T A =25 C Single Pulse
0.01 0.1 1 10
o
1s DC
0.001 100 0.00001 0.0001 0.001 0.01 0.1 1 10
V DS , Drain-to-Source Voltage (V)
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
VDS 90%
VG QG 4.5V QGS QGD
10% VGS td(on) tr td(off)tf Charge Q
Fig 11. Switching Time Waveform
Fig 12. Gate Charge Waveform


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